libhns: Fixes some bugs for libhns

Changes to be committed:
	new file:   0094-libhns-Fix-the-max_inline_data-value.patch
	new file:   0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch
	new file:   0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch
	modified:   rdma-core.spec

Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
This commit is contained in:
Xinghai Cen 2025-03-12 11:33:50 +08:00
parent aff214cd0e
commit 7e0373e600
4 changed files with 183 additions and 1 deletions

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@ -0,0 +1,60 @@
From 1960a28512d4ddd96e82e141f1135ace8cf6054b Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Tue, 25 Feb 2025 20:18:01 +0800
Subject: [PATCH] libhns: Fix the max_inline_data value
driver inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5
----------------------------------------------------------------------
If max_inline_data=0, roundup_pow_of_two(0)=1.
cap->max_inline_data will be modify to 1, which
doesn't meet expectations. Here fix it.
Fixes: e0c8de59b29a ("libhns: Fix the problem of sge nums")
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 47b1f8b..98a18c6 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -1714,6 +1714,18 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud,
return inline_sge;
}
+static uint32_t get_max_inline_data(struct hns_roce_context *ctx,
+ struct ibv_qp_cap *cap)
+{
+ if (cap->max_inline_data) {
+ return min_t(uint32_t,
+ roundup_pow_of_two(cap->max_inline_data),
+ ctx->max_inline_data);
+ }
+
+ return 0;
+}
+
static void set_ext_sge_param(struct hns_roce_context *ctx,
struct ibv_qp_init_attr_ex *attr,
struct hns_roce_qp *qp, unsigned int wr_cnt)
@@ -1730,9 +1742,8 @@ static void set_ext_sge_param(struct hns_roce_context *ctx,
attr->cap.max_send_sge);
if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) {
- attr->cap.max_inline_data = min_t(uint32_t, roundup_pow_of_two(
- attr->cap.max_inline_data),
- ctx->max_inline_data);
+ attr->cap.max_inline_data =
+ get_max_inline_data(ctx, &attr->cap);
inline_ext_sge = max(ext_wqe_sge_cnt,
get_sge_num_from_max_inl_data(is_ud,
--
2.33.0

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@ -0,0 +1,76 @@
From 32cc1a9fe19c00bcf5512afa7b51a24de9dd8424 Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Tue, 25 Feb 2025 20:29:53 +0800
Subject: [PATCH] libhns: Adapt UD inline data size for UCX
driver inclusion
category: feature
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5
----------------------------------------------------------------------
Adapt UD inline data size for UCX. The value
must be at least 128 to avoid the ucx bug.
The issue url:
https://github.com/openucx/ucx/issues/10423
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u.h | 2 ++
providers/hns/hns_roce_u_verbs.c | 16 ++++++++++++----
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h
index 323d2f9..863d4b5 100644
--- a/providers/hns/hns_roce_u.h
+++ b/providers/hns/hns_roce_u.h
@@ -83,6 +83,8 @@ typedef _Atomic(uint64_t) atomic_bitmap_t;
#define HNS_ROCE_ADDRESS_MASK 0xFFFFFFFF
#define HNS_ROCE_ADDRESS_SHIFT 32
+#define HNS_ROCE_MIN_UD_INLINE 128
+
#define roce_get_field(origin, mask, shift) \
(((le32toh(origin)) & (mask)) >> (shift))
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 98a18c6..7418d2c 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -1715,11 +1715,19 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud,
}
static uint32_t get_max_inline_data(struct hns_roce_context *ctx,
- struct ibv_qp_cap *cap)
+ struct ibv_qp_cap *cap,
+ bool is_ud)
{
- if (cap->max_inline_data) {
+ uint32_t max_inline_data = cap->max_inline_data;
+
+ if (max_inline_data) {
+ max_inline_data = roundup_pow_of_two(max_inline_data);
+
+ if (is_ud && max_inline_data < HNS_ROCE_MIN_UD_INLINE)
+ max_inline_data = HNS_ROCE_MIN_UD_INLINE;
+
return min_t(uint32_t,
- roundup_pow_of_two(cap->max_inline_data),
+ max_inline_data,
ctx->max_inline_data);
}
@@ -1743,7 +1751,7 @@ static void set_ext_sge_param(struct hns_roce_context *ctx,
if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) {
attr->cap.max_inline_data =
- get_max_inline_data(ctx, &attr->cap);
+ get_max_inline_data(ctx, &attr->cap, is_ud);
inline_ext_sge = max(ext_wqe_sge_cnt,
get_sge_num_from_max_inl_data(is_ud,
--
2.33.0

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@ -0,0 +1,37 @@
From a1e9d50eda32f05fe6af3712d1e70d3b6944528a Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Mon, 10 Mar 2025 11:47:23 +0800
Subject: [PATCH 96/96] libhns: Fix wrong order of spin_unlock in modify_qp
driver inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5
----------------------------------------------------------------------
The spin_unlock order should be the reverse of spin_lock() order.
Fixes: f29e2a7fa40d ("[PATCH] libhns: Add support for the thread domain and the parent domain")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_hw_v2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
index f05b839..70fe2f7 100644
--- a/providers/hns/hns_roce_u_hw_v2.c
+++ b/providers/hns/hns_roce_u_hw_v2.c
@@ -1936,8 +1936,8 @@ static int hns_roce_u_v2_modify_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr,
if (flag) {
if (!ret)
qp->state = IBV_QPS_ERR;
- hns_roce_spin_unlock(&hr_qp->sq.hr_lock);
hns_roce_spin_unlock(&hr_qp->rq.hr_lock);
+ hns_roce_spin_unlock(&hr_qp->sq.hr_lock);
}
if (ret)
--
2.33.0

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@ -1,6 +1,6 @@
Name: rdma-core
Version: 41.0
Release: 32
Release: 33
Summary: RDMA core userspace libraries and daemons
License: GPLv2 or BSD
Url: https://github.com/linux-rdma/rdma-core
@ -99,6 +99,9 @@ patch90: 0090-libhns-Fix-coredump-during-QP-destruction-when-send_.patch
patch91: 0091-libhns-Fix-the-identification-mark-of-RDMA-UD-packet.patch
patch92: 0092-libhns-Fix-missing-fields-for-SRQ-WC.patch
patch93: 0093-libxscale-Add-Yunsilicon-User-Space-RDMA-Driver.patch
patch94: 0094-libhns-Fix-the-max_inline_data-value.patch
patch95: 0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch
patch96: 0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch
BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0)
BuildRequires: pkgconfig(libnl-route-3.0) valgrind-devel systemd systemd-devel
@ -349,6 +352,12 @@ fi
%{_mandir}/*
%changelog
* Wed Mar 12 2025 Xinghai Cen <cenxinghai@h-partners.com> - 41.0-33
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: Fixes some bugs for libhns
* Tue Mar 4 2025 Xin Tian <tianx@yunsilicon.com> - 41.0-32
- Type: requirement
- ID: NA