7e0373e600
Changes to be committed: new file: 0094-libhns-Fix-the-max_inline_data-value.patch new file: 0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch new file: 0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch modified: rdma-core.spec Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
77 lines
2.4 KiB
Diff
77 lines
2.4 KiB
Diff
From 32cc1a9fe19c00bcf5512afa7b51a24de9dd8424 Mon Sep 17 00:00:00 2001
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From: wenglianfa <wenglianfa@huawei.com>
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Date: Tue, 25 Feb 2025 20:29:53 +0800
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Subject: [PATCH] libhns: Adapt UD inline data size for UCX
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driver inclusion
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category: feature
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bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5
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----------------------------------------------------------------------
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Adapt UD inline data size for UCX. The value
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must be at least 128 to avoid the ucx bug.
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The issue url:
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https://github.com/openucx/ucx/issues/10423
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Signed-off-by: wenglianfa <wenglianfa@huawei.com>
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Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
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---
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providers/hns/hns_roce_u.h | 2 ++
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providers/hns/hns_roce_u_verbs.c | 16 ++++++++++++----
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2 files changed, 14 insertions(+), 4 deletions(-)
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diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h
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index 323d2f9..863d4b5 100644
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--- a/providers/hns/hns_roce_u.h
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+++ b/providers/hns/hns_roce_u.h
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@@ -83,6 +83,8 @@ typedef _Atomic(uint64_t) atomic_bitmap_t;
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#define HNS_ROCE_ADDRESS_MASK 0xFFFFFFFF
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#define HNS_ROCE_ADDRESS_SHIFT 32
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+#define HNS_ROCE_MIN_UD_INLINE 128
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+
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#define roce_get_field(origin, mask, shift) \
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(((le32toh(origin)) & (mask)) >> (shift))
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diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
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index 98a18c6..7418d2c 100644
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--- a/providers/hns/hns_roce_u_verbs.c
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+++ b/providers/hns/hns_roce_u_verbs.c
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@@ -1715,11 +1715,19 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud,
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}
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static uint32_t get_max_inline_data(struct hns_roce_context *ctx,
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- struct ibv_qp_cap *cap)
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+ struct ibv_qp_cap *cap,
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+ bool is_ud)
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{
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- if (cap->max_inline_data) {
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+ uint32_t max_inline_data = cap->max_inline_data;
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+
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+ if (max_inline_data) {
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+ max_inline_data = roundup_pow_of_two(max_inline_data);
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+
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+ if (is_ud && max_inline_data < HNS_ROCE_MIN_UD_INLINE)
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+ max_inline_data = HNS_ROCE_MIN_UD_INLINE;
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+
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return min_t(uint32_t,
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- roundup_pow_of_two(cap->max_inline_data),
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+ max_inline_data,
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ctx->max_inline_data);
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}
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@@ -1743,7 +1751,7 @@ static void set_ext_sge_param(struct hns_roce_context *ctx,
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if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) {
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attr->cap.max_inline_data =
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- get_max_inline_data(ctx, &attr->cap);
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+ get_max_inline_data(ctx, &attr->cap, is_ud);
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inline_ext_sge = max(ext_wqe_sge_cnt,
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get_sge_num_from_max_inl_data(is_ud,
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--
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2.33.0
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